全加结构抽取和补偿滤波器的高效实现

Efficient Implementation of an All-Adder Multiplier-Free Decimation and Compensation Filter

  • 摘要: 针对接收机设计中使用有限冲击响应(FIR)滤波器对级联积分梳状(CIC)抽取滤波器进行补偿滤波的问题,提出了一种全加结构无乘法运算的FIR补偿滤波器实现方式. 通过对FIR补偿滤波器系数的近似,将滤波器系数用与它最接近的2<em>n集合中的一个数表示,将滤波器乘法运算转换为移位运算,整个补偿滤波运算仅由滤波器阶数个加法单元构成. 仿真结果表明,这种采用系数近似的算法在实现高速运算的同时,可以满足对CIC抽取滤波器进行补偿滤波的要求.

     

    Abstract: A novel algorithm on multiplier-free finite impulse response filter(FIR) is presented, which can be efficiently implemented to compensate the cascade integrator-comb filter passband ripple. The multiplier-free architecture is achieved by a power-of-2 digital to approximately represent the compensation filter coefficients. With this representation, multiply operation is replaced with a shift operation, which can be efficiently hardware implemented. Simulation results proved that the coefficients-approximate filter can well reach the demand of CIC compensation filter.

     

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