Study and Realization of High Performance Signal Processing System

Building up a distributed processing system of high performance is a complex problem and the communication among many processor elements affects the performance of the overall processing system. In the proposed architecture of processing system, the traditional method of bus sharing is avoided and the RapidIO protocol is used to achieve the multi-processor system based on the peer-to-peer and switch; the communication processor to connect DSP is achieved by FPGA (field programmable gate array). Performance of the processor is discussed and analyzed in detail.