A New Algorithm for Connected Components Labeling
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Abstract
A new connected components labeling algorithm is proposed in this paper. Compared with other algorithms suitable for hardware, it not only increases the function of false alarm removing, but also compounds a one-dimensional array and run-length codes structure into a two-dimensional array structure. The proposed algorithm has great advantages in terms of speed, resource utilization and algorithm performance. Results of simulation based on Matlab and FPGA demonstrate that new algorithm can completely record labels and parameters information. Compared with other algorithms, time consumption would decrease approximately fifty percent and the complexity of the controlling logic is reduced, when this algorithm is used to meet the requests of FPGA application to acquiring parameters' information with high speed and preciseness.
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