SPCMap: A Power-Aware and Compilation-Efficient Mapping Framework for Heterogeneous CGRAs in Onboard SAR Imaging

Onboard real-time synthetic aperture radar (SAR) imaging is essential for time-sensitive applications but faces strict power constraints on satellites. Heterogeneous coarse-grained reconfigurable arrays (CGRAs) with circuit-switched networks offer an efficient and flexible platform for SAR computing, yet existing mapping methods fail to jointly optimize power and compilation time efficiency. This article introduces SAR-aware Power-and-Compilation-Efficient Mapping (SPCMap), a SAR-aware mapping framework for heterogeneous CGRAs that tackles this joint challenge. SPCMap features four innovations. 1) a power-aware modulo routing resource graph modeling method for accurate power estimation. 2) An anchor diffusion method leveraging the multisource convergence pattern of SAR data flows to prune the search space. 3) a nongreedy progressive search method to escape local optima. 4) A parameterized active backtracking method for robustness. Evaluated on 13 real SAR data flow graphs (DFGs) using a 12-nm CGRA platform, SPCMap achieves 100% mapping success. It reduces router power by up to 62.7%, with an average deviation of only 2.4% from the theoretical optimum, while keeping compilation time within 1.4× of the fastest greedy baseline. Ablation studies confirm the contribution of each component. In cross-platform comparisons, the proposed CGRA with SPCMap attains a leading normalized energy efficiency of 3.44×10⁷ pixel²/s/W, outperforming existing processors. SPCMap thus balances power, compilation time, and reliability, providing a practical compilation solution for energy-efficient onboard SAR imaging.